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How Bus Mastering Works (Page 2/4)

Posted: October 24, 2000
Written by: Tuan "Solace" Nguyen

PIO Mode Transfer (cont.)

Using PIO mode transfer, a packet or segment of data that needs to be transferred is associated with specific instructions that are coded in software. A set of command and direction instructions is used to send data a device to the CPU and back. Furthermore, if you wanted the data to be transferred to system memory, more instructions are needed. Since all this data transferring is done by software programmed instructions, the CPU must monitor what is going on and that takes a toll on CPU cycles too. Some of the things that the CPU needs to monitor are whether a transfer can take place between what device and it needs to check whether or not the device sending the data is ready for I/O data.

One way to alleviate stress from the CPU is to use the I/O controller. The I/O controller will do all the necessary controlling and commanding of peripheral devices and will only rely on the CPU on special conditions such as “go ahead” signals. The I/O controller can request CPU attention by using an IRQ or Interrupt Request.

The following is how data would be transferred on a system using PIO mode transfer on its hard drives.

The PIO protocol used by the original WD1003 controller, as well as today's IDE drives, was originally designed for low-end DOS environments. With this protocol, once the CPU has given a command to the disk controller, it waits for an interrupt from the controller indicating that one 512-byte sector can be transferred. When the interrupt is received, the CPU executes a String Move instruction to move the data between the system RAM and the controller's sector buffer. The String Move instruction executes a tight loop of microcode within the CPU chip, moving one 512-byte sector in 256 16-bit operations. If the disk read or write command is for multiple sectors, the CPU then waits for another interrupt before transferring the next sector. One interrupt will occur for each 512-byte sector transferred.

IRQ levels let a device in your system interrupt your processor from what it is currently doing and direct its attention to something else (the device that asked for the interrupt). After the job is finished the CPU returns to whatever tasks it was doing before.

DMA Mode Transfer

A more sophisticated and efficient method of data transfer than is Direct Memory Access or DMA. DMA utilizes special hardware to move data directly to and from system RAM without processor intervention. During a data move operation, the DMA hardware suspends CPU operation and takes control over the system bus. The hardware then automatically moves the data between system RAM and a buffer in the peripheral controller (for example your shiny new Promise Ultra100 controller).

There are two primary types of DMA used in PCs. The lowest performance and least expensive of the two is called third-party DMA. The floppy disk controller in PC/AT ISA and EISA computers uses this method of moving data. Third party DMA requires an independent DMA controller, which is built into motherboard chipsets, to move data between a peripheral card (the first party) and system RAM (the second party). The DMA controller itself, can be shared by multiple peripheral cards, which is why it is viewed as the third party DMA.

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